VeriDebug: A Unified LLM for Verilog Debugging via Contrastive Embedding and Guided Correction
nwang227
LLM-EDA
AI & ML interests
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Recent Activity
updated a model 8 days ago
LLM-EDA/data-centric-ai-soul published a model 9 days ago
LLM-EDA/data-centric-ai-soul updated a dataset 23 days ago
LLM-EDA/dataOrganizations
models 11
LLM-EDA/data-centric-ai-soul
Updated • 10
LLM-EDA/VeriPrefer-deepseek-coder-7b-v1.5-sft
Updated
LLM-EDA/VeriPrefer-Qwen2.5-14B
15B • Updated • 4 • 1
LLM-EDA/VeriPrefer-Qwen2.5-Coder-7B
8B • Updated • 5 • 1
LLM-EDA/VeriPrefer-CodeQwen1.5-7B
7B • Updated • 1
LLM-EDA/VeriPrefer-deepseek-coder-7b-v1.5
7B • Updated • 4
LLM-EDA/VeriPrefer-CodeLlama-7b
7B • Updated • 5
LLM-EDA/VeriPrefer-Mistral-7B-v0.2
7B • Updated • 2
LLM-EDA/VeriSeek
Text Generation • 7B • Updated • 3
LLM-EDA/VeriDebug
Updated • 1
datasets 8
LLM-EDA/data
Viewer • Updated • 1 • 18
LLM-EDA/qwen_7B_pairs.json
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LLM-EDA/pyra_medium
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LLM-EDA/pyra_tb
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LLM-EDA/pyra
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LLM-EDA/vgen_cpp
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LLM-EDA/opencores
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LLM-EDA/BuggyVerilog
Preview • Updated • 8 • 1