Datasets:
jblitzar
/
github-python

Dataset card Data Studio Files
xet
 Community
text
stringlengths
0
93.6k
- value of register
"""
return self.regs[reg]
def get_eflag(self, eflag):
"""
Get eflag register from gdb
"""
EFLAGS = {}
EFLAGS['cf'] = 1 << 0
EFLAGS['pf'] = 1 << 2
EFLAGS['af'] = 1 << 4
EFLAGS['zf'] = 1 << 6
EFLAGS['sf'] = 1 << 7
EFLAGS['tf'] = 1 << 8
EFLAGS['if'] = 1 << 9
EFLAGS['df'] = 1 << 10
EFLAGS['of'] = 1 << 11
result = {}
eflags = self.get_reg("eflags")
for key, value in EFLAGS.iteritems():
result[key] = bool(eflags & value)
return result[eflag]
def get_vmmap(self):
"""
Get virtual memory mappings from gdb
"""
pid = int(gdb.selected_inferior().pid)
maps = []
mpath = "/proc/%s/maps" % pid
# 00400000-0040b000 r-xp 00000000 08:02 538840 /path/to/file
pattern = re.compile(
"([0-9a-f]*)-([0-9a-f]*) ([rwxps-]*)(?: [^ ]*){3} *(.*)")
out = open(mpath).read()
matches = pattern.findall(out)
if matches:
for (start, end, perm, mapname) in matches:
start = int(("0x%s" % start), 0)
end = int(("0x%s" % end), 0)
if mapname == "":
mapname = "mapped"
maps += [(start, end, perm, mapname)]
return maps
class Symbolic(Singleton, object):
"""
Saved information about Symbolic execution
"""
def __init__(self):
if (self._initialized):
return
self._initialized = True
self.debug = False
self.symbolized_argc = False
self.symbolized_argv = False
self.symbolized_memory = []
self.registers = {}
self.breakpoint = None
self.target_address = None
def check(self):
if not self.target_address:
return False
return True
def log(self, s):
if self.debug:
print(s)
def emulate(self, pc):
while pc:
# Fetch opcodes
opcode = TritonContext.getConcreteMemoryAreaValue(pc, 16)
# Create the Triton instruction
instruction = Instruction()
instruction.setOpcode(opcode)
instruction.setAddress(pc)
# Process
if (not TritonContext.processing(instruction)):
print("Current opcode is not supported.")
self.log(instruction)
if TritonContext.isRegisterSymbolized(Arch().triton_pc_reg):
pc_expr = TritonContext.getSymbolicExpressionFromId(
TritonContext.getSymbolicRegisterId(Arch().triton_pc_reg))
pc_ast = astCtxt.extract(Arch().reg_bits - 1, 0,
pc_expr.getAst())
# Define constraint
cstr = astCtxt.equal(pc_ast,
astCtxt.bv(self.target_address,
Arch().reg_bits))